fix(asm): prefix MOVQ2DQ with F3
The two bank-crossing quadword moves take the mandatory prefix by direction: the toolchain renders F3 0F D6 as MOVQ2DQ with the MMX source and F2 0F D6 as MOVDQ2Q with the XMM source, and the encoder emitted F2 for both, so MOVQ2DQ encoded MOVDQ2Q. Assisted-by: GLM 5.3 Flash
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@@ -184,8 +184,11 @@ func (e *enc) encode(mnem string, ops []Operand) error {
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return fmt.Errorf("RETFL expects an immediate")
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}
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return e.emit(&instr{opcode: []byte{0xCA}, modrm: -1, sib: -1, imm: le16(int64(imm))})
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// MOVDQ2Q/MOVQ2DQ cross the MMX and XMM banks (F2 0F D6), the register
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// in the reg field, the other bank's in r/m.
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// MOVDQ2Q/MOVQ2DQ cross the MMX and XMM banks, and each direction
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// carries its own mandatory prefix: the toolchain renders F3 0F D6 as
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// MOVQ2DQ (the MMX source, XMM destination) and F2 0F D6 as MOVDQ2Q
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// (the XMM source, MMX destination), the register in the reg field, the
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// other bank's in r/m.
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case "MOVDQ2Q", "MOVQ2DQ":
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if len(ops) != 2 {
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return fmt.Errorf("%s expects 2 operands, got %d", upper, len(ops))
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@@ -199,7 +202,11 @@ func (e *enc) encode(mnem string, ops []Operand) error {
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upper == "MOVQ2DQ" && (!srcReg.mmx || !dstReg.isVec()) {
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return fmt.Errorf("%s crosses the XMM and MMX banks in that order", upper)
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}
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i := &instr{prefix: 0xF2, opcode: []byte{0x0F, 0xD6}, modrm: -1, sib: -1}
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prefix := byte(0xF2)
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if upper == "MOVQ2DQ" {
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prefix = 0xF3
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}
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i := &instr{prefix: prefix, opcode: []byte{0x0F, 0xD6}, modrm: -1, sib: -1}
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if err := setRM(i, dstReg, srcReg, 8); err != nil {
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return err
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}
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@@ -24,6 +24,9 @@ func TestRenderedTextEncodes(t *testing.T) {
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// The segment-absolute rendering lowers to the FS-prefixed disp32
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// absolute, exactly what the 0(FS) spelling encodes.
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{"MOVQ FS:0, DX", "64488b142500000000"},
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// The bank-crossing quadword move takes the prefix by direction: the
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// MMX source carries F3, the XMM source F2.
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{"MOVQ2DQ M2, X11", "f3440fd6da"},
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} {
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src := "TEXT \u00b7k(SB), NOSPLIT, $0\n\t" + tt.text + "\n\tRET\n"
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f, errs := parser.Parse("k.s", src)
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