 petrbalvin
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4632ac1bb9
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feat(arch): add the AVX-VNNI-INT16 dot products to the extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 19:49:15 +02:00 |
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petrbalvin
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96000dd64d
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feat(arch): add the VEX encoder to the extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 19:49:15 +02:00 |
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petrbalvin
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47d561b229
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refactor(arch): extract the displacement tail and SIB builders
Assisted-by: GLM 5.3 Flash
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2026-10-07 19:49:15 +02:00 |
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petrbalvin
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27ef71859b
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feat(arch): add VMINMAXSH to the extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 19:49:15 +02:00 |
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petrbalvin
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03f9ef0ac6
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feat(arch): add the FP16 complex fused multiply-add to the extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 19:49:15 +02:00 |
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petrbalvin
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509afbb6c9
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feat(arch): add the FP16 complex multiply and minimum-maximum to the extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 18:59:09 +02:00 |
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petrbalvin
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8080e0acef
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feat(arch): add the AVX512-FP16 FMA families to the extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 18:58:49 +02:00 |
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petrbalvin
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d03de62c07
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feat(arch): add the amd64 fp16 packed imm8-control group
Assisted-by: GLM 5.3
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2026-10-07 13:51:48 +02:00 |
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petrbalvin
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8de1b371da
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feat(arch): add the amd64 fp16 packed conversion family
Assisted-by: GLM 5.3
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2026-10-07 13:51:48 +02:00 |
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petrbalvin
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fb6d01a7d0
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feat(arch): encode the amd64 embedded rounding and SAE decorations
Assisted-by: GLM 5.3
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2026-10-07 13:51:48 +02:00 |
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petrbalvin
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c2adde948f
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feat(arch): add the write mask to the packed amd64 destinations
Assisted-by: GLM 5.3 Flash
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2026-10-07 02:21:57 +02:00 |
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petrbalvin
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11cac26508
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feat(arch): add the scaled index to the amd64 memory operands
Assisted-by: GLM 5.3 Flash
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2026-10-07 02:06:11 +02:00 |
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petrbalvin
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ccb155437e
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feat(arch): add the {1toN} broadcast to the packed amd64 memory sources
Assisted-by: GLM 5.3 Flash
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2026-10-07 02:06:11 +02:00 |
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petrbalvin
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8d611bfdaf
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feat(arch): add the remaining scalar FP16 memory forms to the extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 01:35:48 +02:00 |
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petrbalvin
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454a21f5b7
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feat(arch): add the packed FP16 and BF16 memory forms to the extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 01:35:48 +02:00 |
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petrbalvin
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d275dee3ae
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feat(arch): add the scalar FP16 memory forms to the amd64 extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 01:35:48 +02:00 |
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petrbalvin
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7d69dda874
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feat(arch): add the amd64 memory-operand mechanism to the extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 01:35:48 +02:00 |
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petrbalvin
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103864e8b2
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feat(arch): add the VL packed FP16 forms to the amd64 extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 00:37:41 +02:00 |
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petrbalvin
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aa9c7ca030
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feat(arch): add the imm8 scalar FP16 controls to the amd64 extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 00:33:30 +02:00 |
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petrbalvin
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0354a1f4c1
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feat(arch): scale and exponent-extract the scalar FP16 in the extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 00:07:58 +02:00 |
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petrbalvin
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22055b9bf3
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feat(arch): add the packed FP16 arithmetic to the amd64 extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 00:07:58 +02:00 |
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petrbalvin
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bc37ea5b79
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feat(arch): add the AVX512-FP16 scalar family to the amd64 extension layer
Assisted-by: GLM 5.3 Flash
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2026-10-07 00:07:58 +02:00 |
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petrbalvin
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28bea95128
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feat(arch): add the amd64 extended-instruction layer with BF16 and VP2INTERSECT
Assisted-by: GLM 5.3 Flash
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2026-10-07 00:07:58 +02:00 |
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