7 Commits

Include renames

Author	SHA1	Message	Date
petrbalvin	a7f9d5eb67	feat(disasm): render the loong64 families x/arch names Unknown ... x/arch's Plan 9 renderer decodes thirty-odd scalar loong64 operations perfectly but prints them as "Unknown OP args", and names the sign-extension pair EXT.W.B/EXT.W.H "?". The supplementary naming pass re-renders them with the toolchain's own spellings: the families whose operand order x/arch already prints the Plan 9 way trade only the mnemonic, and the pointer loads and stores, the acquire loads, the release stores, PRELD and ALSL are rebuilt from the decoded arguments with the toolchain's operand order and its raw displacement reading. ADDU16I.D, a macro helper the assembler never takes as input, keeps the decoder's Unknown render. The loong64 parity fixture grows from 73 to 385 rows, pinning every unique four-byte corpus word the decoder accepts, and the LL/SC displacement divergence in the encoder is documented for asm. Assisted-by: GLM 5.3	2026-10-07 13:50:54 +02:00
petrbalvin	0f6e008c9a	feat(disasm): name the arm64 words arm64asm refuses ... arm64asm rejects three exception-space words the toolchain's corpus assembles: the hypervisor call HVC, the secure monitor call SMC and the speculation barrier SB. The supplementary naming table reads the raw word in the error branch and renders the corpus spellings; the corpus rows are pinned in the parity fixture and the boundary test holds the unallocated neighbours on the placeholder. Assisted-by: GLM 5.3	2026-10-07 13:49:58 +02:00
petrbalvin	458d981f31	feat(disasm): name the CLDEMOTE encoding the decoder refuses ... The hint NOP opcode 0F 1C /r with a memory operand is CLDEMOTE, a memory-only instruction the toolchain's own table carries; the decoder rejects the encoding instead of naming it. The rejected-encoding side of the supplementary table names it from the bytes, and the corpus row 0f1c03 pins the text in the unlisted fixture, round trip byte exact. Assisted-by: GLM 5.3 Flash	2026-10-07 02:27:51 +02:00
petrbalvin	dd356b9e6a	fix(disasm): name the amd64 families x/arch decodes to the zero opcode ... x/arch reports the ADCX, ADOX, RDSEED, RDPID, TPAUSE, UMONITOR, UMWAIT and ENDBR families with no error but the degenerate zero instruction, which GoSyntax renders as Op(0) under its prefix decoration and with a length of one. A supplementary naming table keyed by the opcode pattern restores the toolchain's own spellings and lengths; the parity fixtures pin all 41 corpus rows (ENDBR32 alone, which the toolchain cannot spell, pins as bytes and text in the focused naming test). Assisted-by: GLM 5.3 Flash	2026-10-07 02:27:51 +02:00
petrbalvin	b394551af8	fix(disasm): render amd64 in the toolchain's Go syntax ... Assisted-by: GLM 5.3 Flash	2026-10-07 01:00:45 +02:00
petrbalvin	4d01bb3ecf	build: rename the module to sourcedock.dev/petrbalvin/gasm-sdk	2026-09-26 11:08:43 +02:00
petrbalvin	edc20ffa97	feat(cmd): add gasm dis and share the decoder with the debugger	2026-09-14 18:47:08 +02:00