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v0.13.0 Stable
petrbalvin released this
2026-07-18 13:47:59 +00:00 | 267 commits to main since this releaseThe wider AVX-512 set: ternary logic, permutes, compares, expand/compress,
the opmask instructions and the EVEX rounding/SAE/broadcast suffixes — every
encoding verified byte for byte against the Go assembler.Added
asm: the wider EVEX/AVX-512 set, across roughly sixty new ground-truth
cases: ternary logic (VPTERNLOGD/Q), the lane shuffles/inserts/extracts
(VSHUF{F,I}{32,64}X{2,4}, the VINSERT*/VEXTRACT* {F,I}{32,64}X{2,4,8}
family, VPALIGNR), compares with an opmask destination (VCMPPD/PS/SD/SS —
a new NDS-plus-immediate form with the K register in the reg field), the
permutes (VPERMB/W, VPERMI2/T2 D/Q/PD), the wider integer families
(VPMADDWD/UBSW, VPMULHUW, VPACKSSWB/USWB/SSDW/USDW, VPABS B/W/D/Q, the
VPROL*/VPROR* rotates, the word shifts and the EVEX W1 qword shifts),
expand/compress (VEXPANDPD/PS, VPEXPANDD/Q, VCOMPRESSPD/PS, VPCOMPRESSD/
Q), the broadcasts (VPBROADCASTB/W from a GPR or memory, VBROADCASTSS/
SD), the opmask-register instructions (KAND/KOR/KXNOR/KADD/KUNPCK/KNOT/
KSHIFTL/KORTEST B/W/D/Q and KMOVQ, whose width the L/W/pp bits select),
the packed single arithmetic (VADD/VSUB/VMUL/VDIV/VMIN/VMAX PS), the
aligned moves (VMOVAPS/APD, VMOVDQA32/64, VMOVSS), the replicating moves
(VMOVSLDUP/VMOVSHDUP), the conversions (VCVTPS2DQ, VCVTTPS2DQ) and the
remaining extending and narrowing moves (VPMOVSXBW, VPMOVZXBW, VPMOVWB,
VPMOVQB).asm: the EVEX mnemonic suffixes the Go assembler accepts — the rounding
modes.RN_SAE,.RD_SAE,.RU_SAE,.RZ_SAE(the EVEX b bit with the
rounding control in L'L), suppress-all-exceptions.SAE, and memory
broadcast.BCST(the b bit, the vector length preserved, disp8×N scaled
by the element size) — each combinable with the.Zzeroing suffix,
validated against the Go assembler's bytes, and rejected on instructions
that do not support them.
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