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  • v0.16.0 5af12e15ac
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    v0.16.0 Stable

    petrbalvin released this 2026-08-02 21:11:30 +00:00 | 263 commits to main since this release

    The scalar conversions between vector and general-purpose registers — the
    last of the amd64 EVEX instruction set.

    Added

    • asm: the GPR-interchanging conversions, byte for byte against the Go
      assembler (28 ground-truth cases including memory sources and extended
      GPRs): vector to GPR — the signed and truncated VCVT{,T}S{D,S}2SI{,Q}
      in both VEX and EVEX, and the unsigned VCVT{,T}S{D,S}2USI{L,Q}
      (EVEX only); GPR to vector — VCVTSI2SD{L,Q}/VCVTSI2SS{L,Q} (VEX and
      EVEX) and VCVTUSI2SD{L,Q}/VCVTUSI2SS{L,Q} (EVEX only), whose preserved
      vector source sits in vvvv (three Plan 9 operands).
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