377 lines
9.6 KiB
Go
377 lines
9.6 KiB
Go
// Copyright (c) 2026 Petr Balvín <opensource@petrbalvin.org> (https://petrbalvin.org)
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// SPDX-License-Identifier: BSD-3-Clause
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package asm
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import (
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"fmt"
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"strings"
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)
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// Encode encodes one Plan 9 instruction (mnemonic plus operands, in source
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// order) into x86-64 machine code.
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func Encode(mnemonic string, ops ...Operand) ([]byte, error) {
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e := &enc{}
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if err := e.encode(mnemonic, ops); err != nil {
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return nil, err
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}
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return e.out, nil
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}
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type enc struct {
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out []byte
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patches []encPatch // disp32 fields awaiting static-symbol resolution
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}
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// encPatch marks a 4-byte displacement field in enc.out that must receive the
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// RIP-relative offset of a static symbol once the file layout is settled.
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type encPatch struct {
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off int
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name string
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addend int64
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}
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func (e *enc) encode(mnem string, ops []Operand) error {
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upper := strings.ToUpper(mnem)
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// Fixed-name instructions (no size suffix).
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switch {
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case upper == "RET":
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return e.encodeRet()
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case upper == "NOP":
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return e.emit(&instr{opcode: []byte{0x90}, modrm: -1, sib: -1})
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case upper == "CALL":
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return e.encodeJmpRel(ops, []byte{0xE8})
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case upper == "JMP":
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return e.encodeJmpRel(ops, []byte{0xE9})
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}
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if cc, ok := condCode(upper); ok {
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return e.encodeJcc(cc, ops)
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}
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// VEX (AVX/AVX2) and EVEX (AVX-512) instructions: the trailing
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// B/W/L/Q/D is part of the mnemonic, not a size suffix, so dispatch
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// before splitSize. EVEX suffixes (.Z, .SAE, rounding, .BCST) split
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// off the mnemonic too.
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base, sfx, err := parseEvexSuffix(upper)
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if err != nil {
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return err
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}
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if isVex(base) || isEvex(base) || isKOp(base) || isGather(base) || isScatter(base) || base == "KMOVW" || base == "KMOVQ" {
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return e.encodeVec(base, ops, sfx)
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}
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if sfx.any() {
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return fmt.Errorf("%s: the suffix requires an EVEX instruction", mnem)
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}
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// CMOVcc and SETcc carry the condition in the mnemonic (CMOVLGT, SETNE).
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if strings.HasPrefix(upper, "CMOV") {
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return e.encodeCmov(upper, ops)
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}
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if strings.HasPrefix(upper, "SET") {
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return e.encodeSet(upper, ops)
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}
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base, size := splitSize(upper)
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if size == 0 {
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size = 8 // default operand size in 64-bit mode (e.g. PUSHQ)
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}
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switch base {
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case "MOV":
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return e.encodeMov(ops, size)
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case "ADD", "SUB", "AND", "OR", "XOR", "CMP":
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return e.encodeALU(aluOp[base], ops, size)
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case "TEST":
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return e.encodeTest(ops, size)
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case "LEA":
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return e.encodeLea(ops, size)
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case "INC", "DEC", "NEG", "NOT":
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return e.encodeUnary(unaryOp[base], ops, size)
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case "SHL", "SHR", "SAR":
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return e.encodeShift(shiftOp[base], ops, size)
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case "IMUL", "IMUL3":
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return e.encodeImul(ops, size)
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case "PUSH":
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return e.encodePushPop(ops, true)
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case "POP":
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return e.encodePushPop(ops, false)
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case "LZCNT", "TZCNT":
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return e.encodeCount(base, ops, size)
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case "MOVBLZX", "MOVBQZX", "MOVWLZX", "MOVWQZX", "MOVWLSX", "MOVLQSX":
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return e.encodeMovExtend(base, ops)
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case "CVTSL2SD", "CVTSQ2SD":
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return e.encodeCvtsi2sd(base == "CVTSQ2SD", ops)
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case "MOVOU", "MOVO", "MOVUPS", "MOVAPS", "MOVUPD", "MOVAPD", "MOVSD", "MOVSS":
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return e.encodeSSEMove(sseMoveTable[base], ops)
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}
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return fmt.Errorf("unsupported instruction %q", mnem)
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}
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// splitSize separates a trailing B/W/L/Q size suffix from the mnemonic.
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func splitSize(upper string) (base string, size int) {
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if upper == "" {
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return upper, 0
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}
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switch upper[len(upper)-1] {
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case 'B':
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return upper[:len(upper)-1], 1
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case 'W':
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return upper[:len(upper)-1], 2
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case 'L':
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return upper[:len(upper)-1], 4
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case 'Q':
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return upper[:len(upper)-1], 8
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}
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return upper, 0
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}
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// encodeVec dispatches a VEX/EVEX mnemonic to the right encoding: KMOVW has
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// its own direction-dependent opcodes; KTESTW is always VEX; everything else
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// takes EVEX when an operand demands it (a ZMM or K register, or an
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// EVEX-only mnemonic) and VEX otherwise.
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func (e *enc) encodeVec(upper string, ops []Operand, sfx evexSuffix) error {
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if gs, ok := gatherTable[upper]; ok {
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return e.encodeGather(upper, gs, ops, sfx)
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}
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if ss, ok := scatterTable[upper]; ok {
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return e.encodeScatter(upper, ss, ops, sfx)
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}
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if upper == "KMOVW" || upper == "KMOVQ" {
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if sfx.any() {
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return fmt.Errorf("%s takes no EVEX suffixes", upper)
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}
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return e.encodeKmov(upper, ops)
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}
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if isKOp(upper) {
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if sfx.any() {
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return fmt.Errorf("%s takes no EVEX suffixes", upper)
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}
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return e.encodeKOp(upper, ops)
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}
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if upper == "KTESTW" || (!evexRequired(upper, ops) && !sfx.evexOnly()) {
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if sfx.any() {
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return fmt.Errorf("%s: the .Z suffix requires an EVEX instruction", upper)
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}
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return e.encodeVex(upper, ops)
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}
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return e.encodeEvex(upper, ops, sfx)
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}
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// --- instruction components -------------------------------------------------
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type instr struct {
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opSize16 bool
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rexW bool
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rexR bool
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rexX bool
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rexB bool
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rexForced bool // REX needed even with all bits zero (8-bit low registers)
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prefix byte // legacy 0xF2/0xF3 prefix (0 = none); emitted after 0x66
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opcode []byte
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modrm int // -1 if absent
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sib int // -1 if absent
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disp []byte
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imm []byte
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sb *sbRef // static-symbol displacement in disp, awaiting resolution
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}
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// sbRef records that an instruction's displacement refers to a static symbol
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// rather than holding a literal value.
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type sbRef struct {
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name string
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addend int64
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}
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func (e *enc) emit(i *instr) error {
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if i.opSize16 {
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e.out = append(e.out, 0x66)
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}
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if i.prefix != 0 {
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e.out = append(e.out, i.prefix)
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}
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rex := byte(0)
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if i.rexW {
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rex |= 0x08
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}
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if i.rexR {
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rex |= 0x04
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}
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if i.rexX {
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rex |= 0x02
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}
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if i.rexB {
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rex |= 0x01
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}
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if rex != 0 || i.rexForced {
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e.out = append(e.out, 0x40|rex)
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}
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e.out = append(e.out, i.opcode...)
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if i.modrm >= 0 {
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e.out = append(e.out, byte(i.modrm))
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}
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if i.sib >= 0 {
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e.out = append(e.out, byte(i.sib))
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}
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if i.sb != nil {
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e.patches = append(e.patches, encPatch{off: len(e.out), name: i.sb.name, addend: i.sb.addend})
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}
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e.out = append(e.out, i.disp...)
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e.out = append(e.out, i.imm...)
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return nil
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}
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// newInstr starts an instruction with a size-derived REX.W and 0x66 prefix.
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func newInstr(opSize int, opcode []byte) *instr {
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return &instr{
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opSize16: opSize == 2,
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rexW: opSize == 8,
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opcode: opcode,
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modrm: -1,
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sib: -1,
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}
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}
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// --- ModR/M, SIB, displacement ----------------------------------------------
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// setRM fills in the ModR/M (and SIB, displacement, REX bits) for an
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// instruction whose reg field holds a real register `reg` and whose r/m field
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// holds `rm`.
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func setRM(i *instr, reg Reg, rm Operand, opSize int) error {
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return setRMReg(i, reg.idx&7, reg.idx >= 8, reg.needsREX(opSize), rm, opSize)
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}
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// setRMDigit fills in the ModR/M for an instruction whose reg field is an
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// opcode /digit extension (0–7), which carries none of the register REX rules.
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func setRMDigit(i *instr, digit int, rm Operand, opSize int) error {
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return setRMReg(i, digit, false, false, rm, opSize)
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}
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func setRMReg(i *instr, regField int, rexR, regForced bool, rm Operand, opSize int) error {
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i.rexR = rexR
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if regForced {
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i.rexForced = true
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}
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switch r := rm.(type) {
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case Reg:
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i.rexB = r.idx >= 8
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if r.needsREX(opSize) {
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i.rexForced = true
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}
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i.modrm = 0xC0 | regField<<3 | (r.idx & 7)
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return nil
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case Mem:
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return setMem(i, regField, r)
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case sbMem:
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// RIP-relative reference; the displacement is patched once the static
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// symbol's address is known.
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i.modrm = regField<<3 | 0x05 // mod=00, rm=101 → (RIP)+disp32
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i.disp = le32(0)
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i.sb = &sbRef{name: r.name, addend: r.addend}
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return nil
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default:
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return fmt.Errorf("invalid r/m operand %T", rm)
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}
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}
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func setMem(i *instr, regField int, m Mem) error {
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modrm, sib, disp, xBit, bBit, err := memComponents(regField, m)
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if err != nil {
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return err
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}
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i.modrm = modrm
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i.sib = sib
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i.disp = disp
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i.rexX = xBit == 1
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i.rexB = bBit == 1
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return nil
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}
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// memComponents computes the ModR/M byte (with the given reg field), the SIB
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// byte (-1 if none), the displacement bytes, and the high index/base bits, for
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// a memory operand. It is shared by the REX (scalar) and VEX (vector) paths.
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func memComponents(regField int, m Mem) (modrm, sib int, disp []byte, xBit, bBit int, err error) {
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sib = -1
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// RIP-relative: neither base nor index.
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if !m.HasBase && !m.HasIndex {
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return regField<<3 | 0x05, -1, le32(m.Disp), 0, 0, nil // mod=00, rm=101
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}
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needSIB := m.HasIndex || (m.HasBase && m.Base.idx&7 == 4)
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var mod int
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switch {
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case !m.HasBase:
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mod = 0
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disp = le32(m.Disp)
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case m.Base.idx&7 == 5 && m.Disp == 0:
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mod = 1
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disp = []byte{0}
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case m.Disp == 0:
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mod = 0
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case fits8(m.Disp):
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mod = 1
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disp = []byte{byte(int8(m.Disp))}
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default:
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mod = 2
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disp = le32(m.Disp)
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}
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if needSIB {
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idxField := 4 // 100 = no index
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if m.HasIndex {
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idxField = m.Index.idx & 7
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if m.Index.idx >= 8 {
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xBit = 1
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}
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}
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baseField := 5 // 101 = no base (with mod=00 → disp32)
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if m.HasBase {
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baseField = m.Base.idx & 7
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if m.Base.idx >= 8 {
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bBit = 1
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}
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}
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return mod<<6 | regField<<3 | 0x04, scaleBits(m.Scale)<<6 | idxField<<3 | baseField, disp, xBit, bBit, nil
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}
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if m.Base.idx >= 8 {
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bBit = 1
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}
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return mod<<6 | regField<<3 | (m.Base.idx & 7), -1, disp, 0, bBit, nil
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}
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func scaleBits(scale int) int {
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switch scale {
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case 2:
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return 1
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case 4:
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return 2
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case 8:
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return 3
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default:
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return 0 // scale 1 (or unset)
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}
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}
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func fits8(v int64) bool { return v >= -128 && v <= 127 }
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func le32(v int64) []byte {
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u := uint32(v)
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return []byte{byte(u), byte(u >> 8), byte(u >> 16), byte(u >> 24)}
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}
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func le16(v int64) []byte {
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u := uint16(v)
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return []byte{byte(u), byte(u >> 8)}
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}
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func le64(v int64) []byte {
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u := uint64(v)
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b := make([]byte, 8)
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for i := 0; i < 8; i++ {
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b[i] = byte(u >> (8 * i))
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}
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return b
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}
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