119 lines
2.8 KiB
ArmAsm
119 lines
2.8 KiB
ArmAsm
// Copyright (c) 2026 Petr Balvín <opensource@petrbalvin.org> (https://petrbalvin.org)
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// SPDX-License-Identifier: BSD-3-Clause
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// Differential kernel for the arm64 SIMD arrangement bits: the FP one-bit
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// size field (S=0, D=1 at bit 22), the immh field of the long extends, the
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// narrow family's fixed bit 16, the SSHL/USHL size bits, the scalar D forms
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// of the bare VADD/VSUB spellings and the INS lane packing. Every function
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// is byte-compared against go tool asm.
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#include "textflag.h"
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// func fpthree()
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TEXT ·fpthree(SB), NOSPLIT, $0-0
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VFADD V0.S4, V0.S4, V1.S4
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VFADD V0.D2, V0.D2, V1.D2
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VFMUL V0.S4, V0.S4, V1.S4
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VFMUL V0.D2, V0.D2, V1.D2
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VFDIV V0.S4, V0.S4, V1.S4
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VFDIV V0.D2, V0.D2, V1.D2
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VFMLA V1.D2, V12.D2, V1.D2
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VFMLA V1.S2, V12.S2, V1.S2
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VFMLA V1.S4, V12.S4, V1.S4
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VFMAX V3.S4, V2.S4, V1.S4
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VFMAXNM V3.S4, V2.S4, V1.S4
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VFADDP V3.D2, V2.D2, V1.D2
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VFCMEQ V1.S4, V2.S4, V3.S4
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VFCMGE V1.S4, V2.S4, V3.S4
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RET
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// func fpunary()
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TEXT ·fpunary(SB), NOSPLIT, $0-0
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VFABS V0.D2, V1.D2
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VFNEG V0.D2, V1.D2
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VFSQRT V0.D2, V1.D2
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VFRINTN V0.D2, V1.D2
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VFRINTP V0.D2, V1.D2
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VFRINTM V0.D2, V1.D2
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VFRINTZ V0.D2, V1.D2
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VFCVTZS V1.D2, V2.D2
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VFCVTZU V1.D2, V2.D2
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VSCVTF V1.D2, V2.D2
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VUCVTF V1.D2, V2.D2
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VFABS V0.S4, V1.S4
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VSCVTF V1.S4, V2.S4
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VFNEG V0.S2, V1.S2
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RET
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// func shifts()
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TEXT ·shifts(SB), NOSPLIT, $0-0
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VSSHL V1.S4, V2.S4, V3.S4
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VSSHL V1.S2, V2.S2, V3.S2
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VSSHL V1.H4, V2.H4, V3.H4
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VSSHL V1.H8, V2.H8, V3.H8
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VSSHL V1.B8, V2.B8, V3.B8
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VSSHL V1.B16, V2.B16, V3.B16
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VUSHL V1.S4, V2.S4, V3.S4
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VUSHL V1.S2, V2.S2, V3.S2
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VUSHL V1.H4, V2.H4, V3.H4
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VUSHL V1.H8, V2.H8, V3.H8
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VUSHL V1.B8, V2.B8, V3.B8
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VUSHL V1.B16, V2.B16, V3.B16
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VRBIT V24.B8, V24.B8
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RET
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// func widen()
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TEXT ·widen(SB), NOSPLIT, $0-0
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VUXTL V30.B8, V30.H8
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VUXTL V30.H4, V29.S4
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VUXTL V29.S2, V2.D2
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VUXTL2 V30.H8, V30.S4
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VUXTL2 V29.S4, V2.D2
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VUXTL2 V30.B16, V2.H8
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VSXTL V1.B8, V2.H8
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VSXTL V1.H4, V2.S4
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VSXTL V1.S2, V2.D2
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VSXTL2 V1.B16, V2.H8
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VSXTL2 V1.H8, V2.S4
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VSXTL2 V1.S4, V2.D2
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VXTN V1.H8, V2.B8
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VXTN V1.S4, V2.H4
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VXTN V1.D2, V2.S2
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VXTN2 V1.H8, V2.B16
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VSQXTN V1.D2, V2.S2
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VSQXTN2 V1.S4, V2.H8
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VSQXTUN V1.H8, V2.B8
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VUQXTN V1.S4, V2.H4
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VUQXTN2 V1.D2, V2.S4
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RET
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// func uaddw()
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TEXT ·uaddw(SB), NOSPLIT, $0-0
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VUADDW V9.B8, V12.H8, V14.H8
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VUADDW V13.H4, V10.S4, V11.S4
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VUADDW V21.S2, V24.D2, V29.D2
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VUADDW2 V9.B16, V12.H8, V14.H8
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VUADDW2 V13.H8, V20.S4, V30.S4
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VUADDW2 V21.S4, V24.D2, V29.D2
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RET
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// func bareadd()
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TEXT ·bareadd(SB), NOSPLIT, $0-0
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VADD V1, V2, V3
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VADD V1, V3, V3
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VSUB V12, V30, V30
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VSUB V12, V20, V30
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VADD V1.B8, V2.B8, V3.B8
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VSUB V12.B8, V30.B8, V30.B8
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RET
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// func lanes()
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TEXT ·lanes(SB), NOSPLIT, $0-0
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VMOV V12.D[0], V12.D[1]
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VMOV V10.S[0], V12.S[1]
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VMOV V9.H[0], V12.H[1]
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VMOV V12.B[0], V12.B[1]
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VMOV V12.S[2], V12.S[3]
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VMOV V12.H[3], V12.H[5]
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RET
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