feat(arch): the SVE2 shift-by-vector family

Assisted-by: GLM 5.3 Flash
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petrbalvin committed 2026-10-07 20:35:41 +02:00
1 parent b93fccc075
commit bd80499c74
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@@ -783,6 +783,17 @@ func TestArm64AssembleExtensionStage4Golden(t *testing.T) {
{"ZFMAXQV Z25.S, P3, V5.S4", 0x6496af25},
{"ZFMINNMQV Z25.S, P3, V5.S4", 0x6495af25},
{"ZFMINQV Z25.S, P3, V5.S4", 0x6497af25},
// The shift-by-vector family.
{"ZASR Z15.B, Z0.B, P3.M, Z0.B", 0x04108de0},
{"ZASR Z2.D, Z10.D, P3.M, Z10.D", 0x04d08c4a},
{"ZASR Z7.D, Z6.H, Z13.H", 0x046780cd},
{"ZASRR Z15.B, Z0.B, P3.M, Z0.B", 0x04148de0},
{"ZLSL Z2.D, Z10.D, P3.M, Z10.D", 0x04d38c4a},
{"ZLSL Z7.D, Z6.H, Z13.H", 0x04678ccd},
{"ZLSLR Z15.B, Z0.B, P3.M, Z0.B", 0x04178de0},
{"ZLSR Z15.B, Z0.B, P3.M, Z0.B", 0x04118de0},
{"ZLSR Z7.D, Z6.H, Z13.H", 0x046784cd},
{"ZLSRR Z15.B, Z0.B, P3.M, Z0.B", 0x04158de0},
}
for _, tt := range tests {
words := assembleArm64Words(t, arm64ExtProbeHead+"\t"+tt.stmt+"\n\tRET\n")