feat(asm): encode the remaining amd64 VEX families

The SSE3 horizontal and add-subtract pairs, the SSSE3 sign and
horizontal integers, the masked moves in both directions, the
reciprocity and test pairs, the AVX imm8 tail (blends, dot products,
inserts, rounds, MPSADBW, the string compares), the four-operand
variable blends with their /is4 mask byte, the scalar three-operand
moves, the MXCSR accessors, the VPERMIL register controls and the
variable word shifts, plus the BMI2 count forms over memory.  Every
encoding is pinned byte for byte against go tool asm through every
corpus line the toolchain's own amd64enc.s carries for the families
(852 lines); the /is4 byte carries the mask register number in its high
nibble, the layout the toolchain emits.

Assisted-by: GLM 5.3 Flash

asm/evex.go

@@ -921,7 +921,7 @@ func evexRequired(upper string, ops []Operand) bool {
 		// The dual-shape moves pick their VEX form by operand count, so
 		// they are not EVEX-only either.
 		switch upper {
-		case "VMOVHPD", "VMOVLPD":
+		case "VMOVHPD", "VMOVLPD", "VMOVHPS", "VMOVLPS":
 		default:
 			return true // EVEX-only mnemonic
 		}