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458cdd20660eb10b88b93d98e0460dd555190d2d
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71 Commits
Author SHA1 Message Date
petrbalvin 458cdd2066 feat(asm): encode the arm64 register-offset addressing forms 
Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin a0fa7e802c feat(asm): pool the arm64 offsets the split bands cannot carry 
Offsets beyond the split bands ride a per-function literal pool the way
the toolchain lays one out: a PC-relative literal load into REGTMP, then
the register-offset access (the pair family adds the base addition), the
pooled words appended after the last instruction behind the UNDEF guard,
deduplicated by value with the sign- and width-aware load selection.

The same differential pass against the corpus exposed three wrong-code
bugs and fixes them: the logical-immediate period marker rode the wrong
position for every element below 64 bits, so the 32-bit forms encoded a
different constant than written; the plain register operand of an
ADD/SUB against SP took the shifted-register form where the toolchain
uses the extended one with the identity extend, silently truncating
through UXTB; and the AUTIA1716 and AUTIB1716 hint constants were the
PACIA and PACIB encodings.  An offset sweep across every band boundary
now pins all three against the live oracle.

Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin 2bd52eb7ad fix(asm): scale the FLDPQ and FSTPQ pair offsets by sixteen 
The pair encoder derived the imm7 divisor from the width suffix alone, so
the 128-bit FP pairs divided their offsets by eight and encoded twice the
distance.  The Q spellings scale by sixteen like every other 128-bit
access; the differential kernel carries them now.

Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin d1030a1788 test(verify): prove the arm64 lse atomics through the link-parity kernel 
Assisted-by: GLM 5.3 Flash
 2026-10-07 01:31:28 +02:00
petrbalvin 8e3b7f1caa test(verify): prove the amd64 sse families through the link-parity kernel 
Assisted-by: GLM 5.3 Flash
 2026-10-07 01:31:28 +02:00
petrbalvin b22abf512f test(verify): prove the riscv64 vector families through the link-parity kernel 
Assisted-by: GLM 5.3 Flash
 2026-10-07 01:31:28 +02:00
petrbalvin ffc23929c6 refactor(verify): extract the shared goobj link-parity harness 
Assisted-by: GLM 5.3 Flash
 2026-10-07 01:31:28 +02:00
petrbalvin 127e52de69 test(verify): accumulate the BF16 dot product on the metal 
Assisted-by: GLM 5.3 Flash
 2026-10-07 00:07:58 +02:00
petrbalvin a2301b52de test(verify): run the amd64 extension encodings on the metal 
Assisted-by: GLM 5.3 Flash
 2026-10-07 00:07:58 +02:00
petrbalvin b4c1e133c0 ci: keep the GOOBJ link parity gate off the push pipeline
Test / test (push) Failing after 12m18s
Details 
Assisted-by: GLM 5.3 Flash
 2026-10-02 16:15:02 +02:00
petrbalvin dd1782c538 test(verify): gate GOOBJ link parity with cmd/link 
Assisted-by: GLM 5.3
 2026-10-02 00:40:54 +02:00
petrbalvin 4d01bb3ecf build: rename the module to sourcedock.dev/petrbalvin/gasm-sdk
Test / test (push) Successful in 4m18s
Details
2026-09-26 11:08:43 +02:00
petrbalvin b9015e1c2e fix(verify): make the executable mapping build on FreeBSD 
Assisted-by: GLM 5.3 Flash
 2026-09-25 21:46:31 +02:00
petrbalvin 29ac03468e feat(amd64): floating-point immediates through a synthesised pool 
Assisted-by: GLM 5.3 Flash
 2026-09-21 02:04:44 +02:00
petrbalvin 1456907000 feat(riscv64,loong64): operand tail, float DATA and honest port classification 
Assisted-by: GLM 5.3 Flash
 2026-09-21 00:44:47 +02:00
petrbalvin 522e6f2ae8 feat(parser): bracket register ranges, index-only VSIB and bare trailing immediates 
Assisted-by: GLM 5.3 Flash
 2026-09-20 22:02:19 +02:00
petrbalvin 81d4bd81e4 test(verify): register the wave kernels
Test / test (push) Failing after 2m20s
Details 
Assisted-by: GLM 5.3 Flash
 2026-09-20 21:17:31 +02:00
petrbalvin 863926abd6 test(verify): register the loong64 vector kernels 
Assisted-by: GLM 5.3 Flash
 2026-09-20 19:15:05 +02:00
petrbalvin 66aa4dbc8b test(verify): register the campaign kernels in the ground-truth suites 
Assisted-by: GLM 5.3 Flash
 2026-09-20 14:25:47 +02:00
petrbalvin 6c672567f3 feat(amd64): assemble the double-shift and static-SB operand shapes 
Assisted-by: GLM 5.3 Flash
 2026-09-20 11:40:39 +02:00
petrbalvin 5399a8a724 feat(audit): probe the new operand shapes and measure attemptable files 
Assisted-by: GLM 5.3 Flash
 2026-09-20 06:45:03 +02:00
petrbalvin f0d5238c47 docs: state the validation status and correct claims the material contradicts 
Assisted-by: DeepSeek V4.1 Flash
 2026-09-20 01:40:51 +02:00
petrbalvin d3d47db727 test(verify): seed the arm64 ABI kernel arguments 
Assisted-by: GLM 5.3
 2026-09-20 00:57:02 +02:00
petrbalvin 375182ef1f fix(verify): arm64 stack save, adaptive canary and host gating 
Assisted-by: GLM 5.3
 2026-09-19 23:49:19 +02:00
petrbalvin f37f183577 feat(riscv64): GOROOT instruction shapes, DATA order and offset expressions 
Assisted-by: GLM 5.3 Flash
 2026-09-19 19:58:43 +02:00
petrbalvin 23c001be51 feat(asm): encode indirect JMP and CALL on all four architectures 
Assisted-by: GLM 5.3 Flash
 2026-09-19 19:17:07 +02:00
petrbalvin 03d6d4da54 style: put the repository assembly in gasm fmt canonical form 
Assisted-by: GLM 5.3 Flash
 2026-09-17 20:33:18 +02:00
petrbalvin 0078f7be5c style: purge em dashes from the produced text 
Assisted-by: GLM 5.3 Flash
 2026-09-16 23:12:31 +02:00
petrbalvin 40476546df fix(asm): close the oracle parity gaps in frame addressing and calls 2026-09-14 23:25:14 +02:00
petrbalvin 1691c81095 style: replace em and en dashes across sources 2026-09-14 18:22:18 +02:00
petrbalvin 94c4756d47 fix(verify): fix non-amd64 JIT trampolines and validate under qemu 2026-08-31 12:34:50 +02:00
petrbalvin a5a59d6503 fix(verify): gate JIT verification to amd64 until trampolines are hardened
Test / vet (push) Successful in 48s
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Test / test (push) Successful in 2m34s
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Test / build (push) Successful in 41s
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2026-08-30 22:48:48 +02:00
petrbalvin 4171e412b5 feat(verify): save and replay fuzz corpora 
Assisted-by: GLM 5.3 Flash
 2026-08-30 21:42:12 +02:00
petrbalvin 8f84dac10b feat(verify): ABI checks on arm64, riscv64 and loong64 
Assisted-by: GLM 5.3 Flash
 2026-08-30 11:27:54 +02:00
petrbalvin 56ad158772 fix: restore iota blocks, asm --format flag and prose after the syntax pass
Test / vet (push) Successful in 48s
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Test / test (push) Successful in 2m35s
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Test / build (push) Successful in 40s
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2026-08-29 17:12:53 +02:00
petrbalvin 15e8b88d32 style: modernize the new tooling code to match the repo conventions 2026-08-29 16:15:14 +02:00
petrbalvin 9beff4ae85 style: modernize to splitseq, cut, min, maps.copy and range-over-int 2026-08-29 16:04:32 +02:00
petrbalvin eacf33d0f7 fix: staticcheck and deadcode findings repo-wide, modernize counting loops 2026-08-29 15:25:15 +02:00
petrbalvin e44162a749 feat(verify): scalar arguments for -call invocations 2026-08-29 14:03:45 +02:00
petrbalvin 181d8e508c feat(verify): add Call trampolines for arm64, riscv64, loong64 
Assisted-by: MiMo V2.5 Pro
 2026-08-21 00:35:21 +02:00
petrbalvin 97951cbeb6 feat(asm): extend arm64 encoder with atomics, bitfield, SIMD and more test kernels 
Assisted-by: MiMo V2.5 Pro
 2026-08-20 14:31:15 +02:00
petrbalvin 6e73f59e78 feat(asm): extend arm64 encoder with FP, conditional select, CRC32 and tests 
Assisted-by: MiMo V2.5 Pro
 2026-08-20 14:07:12 +02:00
petrbalvin 4221ec5741 feat(asm): add AArch64 arm64 encoder with ground-truth verification 
Assisted-by: MiMo V2.5 Pro
 2026-08-20 13:33:39 +02:00
petrbalvin c05c53452f fix(asm): encode RISC-V CALL sym(SB) as JAL
Test / vet (push) Successful in 47s
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Test / test (push) Failing after 2m9s
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Test / build (push) Skipped
Details 
Assisted-by: DeepSeek V4 Pro
 2026-08-13 18:12:22 +02:00
petrbalvin 681a449c01 fix(asm): match RISC-V branch and jump encodings 2026-08-13 17:57:10 +02:00
petrbalvin 31a2cee382 fix(asm): materialise RISC-V MOV immediates
Test / vet (push) Successful in 44s
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Test / test (push) Failing after 1m56s
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Test / build (push) Skipped
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2026-08-13 17:41:16 +02:00
petrbalvin 3bc7c18bc3 fix(asm): materialise large RISC-V immediates 
Assisted-by: DeepSeek V4 Pro
 2026-08-13 16:04:08 +02:00
petrbalvin f0512a4e1c fix(asm): complete RISC-V compressed loads/stores and word arithmetic 
Assisted-by: DeepSeek V4 Pro
 2026-08-13 15:42:38 +02:00
petrbalvin 373c09f725 fix(asm): correct RISC-V operand order and complete RVC compression 
Assisted-by: DeepSeek V4 Pro
 2026-08-13 15:13:31 +02:00
petrbalvin b78b6c5004 fix(asm): correct RISC-V frame layout and RVC encodings 
Assisted-by: GLM 5.2
 2026-08-13 14:41:57 +02:00