petrbalvin/gasm-sdk
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c1cef7b6e88505f1771db352ec102b4433b28cc9
Commit Graph
49 Commits
Author SHA1 Message Date
petrbalvin c1cef7b6e8 feat(asm): materialise frame-relative addresses the way the toolchain does 
Assisted-by: GLM 5.3 Flash
 2026-10-07 21:34:30 +02:00
petrbalvin 5a5936d222 feat(asm): drain the arm64 literal pool mid-function at the distance bound 
Assisted-by: GLM 5.3 Flash
 2026-10-07 19:54:22 +02:00
petrbalvin 33e7fdac98 fix(asm): enforce the arm64 TLBI, RPRFM, FCVT and integer-pair arities 
Assisted-by: GLM 5.3
 2026-10-07 13:49:49 +02:00
petrbalvin 7a69be8b59 fix(asm): reject the arm64 REGTMP spellings the toolchain refuses 
Assisted-by: GLM 5.3
 2026-10-07 13:49:49 +02:00
petrbalvin 2385bb7069 fix(asm): enforce the arm64 VLD/VST post-index contract 
Assisted-by: GLM 5.3
 2026-10-07 13:49:49 +02:00
petrbalvin 7bc80ccb54 fix(asm): emit nothing for the arm64 NOP pseudo-instruction 
Assisted-by: GLM 5.3
 2026-10-07 13:49:49 +02:00
petrbalvin 405e2427ed fix(asm): place the arm64 literal pool the way the toolchain flushes it 
Assisted-by: GLM 5.3
 2026-10-07 13:49:49 +02:00
petrbalvin 4fc96decc4 fix(asm): size the arm64 logical-immediate materialisation exactly 
Assisted-by: GLM 5.3
 2026-10-07 13:49:49 +02:00
petrbalvin 409c8b348d fix(asm): bound the arm64 VTBL table list before the destination read 
Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin 2b2a72d54e fix(asm): encode the arm64 bitfield aliases with their own opc 
Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin 8ab99c9b0c fix(asm): tighten the arm64 acceptance toward the toolchain 
Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin 82d741514a fix(asm): key the arm64 immediate class order on the ZR spelling 
Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin f20aa156d0 fix(asm): treat the arm64 $-8 frame as frameless and encode the RET forms 
Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin d853432dba fix(asm): route the arm64 logical immediates to ZR through REGTMP 
Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin fbdad8424f feat(asm): encode the arm64 FP immediate moves 
Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin a9b54b6868 fix(asm): carry the arm64 immediate to ZR through MOVZ 
Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin d786b90fa1 feat(asm): lower the arm64 con(register) form to the ADD chain 
Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin 9ef14bdb71 feat(asm): encode the arm64 SIMD arrangement bits 
Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin 458cdd2066 feat(asm): encode the arm64 register-offset addressing forms 
Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin a0fa7e802c feat(asm): pool the arm64 offsets the split bands cannot carry 
Offsets beyond the split bands ride a per-function literal pool the way
the toolchain lays one out: a PC-relative literal load into REGTMP, then
the register-offset access (the pair family adds the base addition), the
pooled words appended after the last instruction behind the UNDEF guard,
deduplicated by value with the sign- and width-aware load selection.

The same differential pass against the corpus exposed three wrong-code
bugs and fixes them: the logical-immediate period marker rode the wrong
position for every element below 64 bits, so the 32-bit forms encoded a
different constant than written; the plain register operand of an
ADD/SUB against SP took the shifted-register form where the toolchain
uses the extended one with the identity extend, silently truncating
through UXTB; and the AUTIA1716 and AUTIB1716 hint constants were the
PACIA and PACIB encodings.  An offset sweep across every band boundary
now pins all three against the live oracle.

Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin 71e8dd550d feat(asm): split wide arm64 load and store offsets into REGTMP 
Offsets the single-instruction forms cannot carry lower the way the
toolchain lowers them: ADD or SUB moves the whole distance into REGTMP
within the ±4095 band, and the 24-bit band above it splits into an ADD of
the high half and an access of the low half, with the pair family taking
the two-ADD sequence.  The split band follows loadStoreClass per width,
byte accesses taking the full 24 bits and the Q width the widest, so an
offset the toolchain pools is never split instead.

Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin 2bd52eb7ad fix(asm): scale the FLDPQ and FSTPQ pair offsets by sixteen 
The pair encoder derived the imm7 divisor from the width suffix alone, so
the 128-bit FP pairs divided their offsets by eight and encoded twice the
distance.  The Q spellings scale by sixteen like every other 128-bit
access; the differential kernel carries them now.

Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin daf7fad5b9 feat(asm): encode the arm64 Q-width FP load and store 
FMOVQ routes through the MOV load/store machinery in the plain, post-index,
pre-index and static-symbol forms.  The Q width carries its size in the opc
field, so the store spelling is opc=10 and the access scales by sixteen;
both come from helpers now instead of the size exponent.  The static-symbol
form takes the toolchain's twelve-byte ADRP + ADD + access fallback with the
R_ADDRARM64 pair.  The register-to-register and immediate forms stay
rejected, matching the toolchain's own table.

Assisted-by: GLM 5.3 Flash
 2026-10-07 02:36:24 +02:00
petrbalvin 9c951c232e feat(asm): assemble the extended instruction layer on arm64 
Assisted-by: GLM 5.3 Flash
 2026-10-07 02:23:37 +02:00
petrbalvin 2747fce7d3 feat(asm): encode the arm64 system registers and structure loads 2026-10-02 20:39:26 +02:00
petrbalvin 17cc49fee4 fix(asm): emit NOPTR data as its own symbol kind 
Assisted-by: GLM 5.3
 2026-10-02 00:40:43 +02:00
petrbalvin 4d01bb3ecf build: rename the module to sourcedock.dev/petrbalvin/gasm-sdk
Test / test (push) Successful in 4m18s
Details
2026-09-26 11:08:43 +02:00
petrbalvin 74d6b90d69 fix(asm): read the arm64 move-wide immediate as an unsigned pattern 
Assisted-by: GLM 5.3 Flash
 2026-09-23 21:03:03 +02:00
petrbalvin 82ef289d3a feat(asm): the immediate multiply and arm64 indirect branches GOROOT writes 
Assisted-by: GLM 5.3 Flash
 2026-09-21 21:50:11 +02:00
petrbalvin b0f9071bf5 feat(arm64): whole-vector moves, bookkeeping ops and truncating-move lowering 
Assisted-by: GLM 5.3 Flash
 2026-09-20 21:17:20 +02:00
petrbalvin 241e7256f6 fix(arm64): reject bare BTI with a diagnostic and accept the full family 
Assisted-by: GLM 5.3 Flash
 2026-09-20 19:15:05 +02:00
petrbalvin 9b238a525a feat(arm64): wide immediates, SIMD compare and system operand forms 
Assisted-by: GLM 5.3 Flash
 2026-09-20 14:25:47 +02:00
petrbalvin 0629f5e2df feat(arm64): assemble PCALIGN padding and BYTE literal bytes
Test / test (push) Successful in 2m16s
Details 
Assisted-by: GLM 5.3 Flash
 2026-09-20 11:49:05 +02:00
petrbalvin ca3fdce0e0 feat(arm64): encode pairs, atomics, crypto, system and NEON slices 
Assisted-by: GLM 5.3 Flash
 2026-09-20 06:44:51 +02:00
petrbalvin d315a998ce fix(arm64): store-exclusive operand order and large-frame parity 
Assisted-by: GLM 5.3
 2026-09-20 00:38:24 +02:00
petrbalvin 401386956c fix(arm64): encode shifts, divides and multiplies and align sizes with emission 
Assisted-by: GLM 5.3
 2026-09-19 23:49:07 +02:00
petrbalvin 23c001be51 feat(asm): encode indirect JMP and CALL on all four architectures 
Assisted-by: GLM 5.3 Flash
 2026-09-19 19:17:07 +02:00
petrbalvin 40476546df fix(asm): close the oracle parity gaps in frame addressing and calls 2026-09-14 23:25:14 +02:00
petrbalvin 8dc1e98ca1 feat(asm): emit the arm64 stack-split guard and morestack block 2026-09-14 20:49:03 +02:00
petrbalvin 953c258d6a fix(asm): make arm64 and loong64 relocations match the toolchain 2026-09-14 18:22:00 +02:00
petrbalvin 56ad158772 fix: restore iota blocks, asm --format flag and prose after the syntax pass
Test / vet (push) Successful in 48s
Details
Test / test (push) Successful in 2m35s
Details
Test / build (push) Successful in 40s
Details
2026-08-29 17:12:53 +02:00
petrbalvin 9beff4ae85 style: modernize to splitseq, cut, min, maps.copy and range-over-int 2026-08-29 16:04:32 +02:00
petrbalvin eacf33d0f7 fix: staticcheck and deadcode findings repo-wide, modernize counting loops 2026-08-29 15:25:15 +02:00
petrbalvin ae550cc05a fix(asm): add cross-package GOOBJ resolution for riscv64, loong64, arm64 
Assisted-by: MiMo V2.5 Pro
 2026-08-21 00:35:21 +02:00
petrbalvin 459f4a2b6e fix(test): add arm64 encoding tests for Go 1.26 coverage compatibility 
Assisted-by: MiMo V2.5 Pro
 2026-08-20 15:44:23 +02:00
petrbalvin 97951cbeb6 feat(asm): extend arm64 encoder with atomics, bitfield, SIMD and more test kernels 
Assisted-by: MiMo V2.5 Pro
 2026-08-20 14:31:15 +02:00
petrbalvin 6e73f59e78 feat(asm): extend arm64 encoder with FP, conditional select, CRC32 and tests 
Assisted-by: MiMo V2.5 Pro
 2026-08-20 14:07:12 +02:00
petrbalvin 4221ec5741 feat(asm): add AArch64 arm64 encoder with ground-truth verification 
Assisted-by: MiMo V2.5 Pro
 2026-08-20 13:33:39 +02:00
petrbalvin 2a27a3a52b docs: add BSD-3-Clause headers to generated files and update CI docs 2026-08-07 22:43:40 +02:00