20 Commits

Include renames

Author	SHA1	Message	Date
petrbalvin	eda8b16c5f	feat(arch): the shift-immediate tsz:imm3 scheme ... Assisted-by: GLM 5.3 Flash	2026-10-07 21:39:45 +02:00
petrbalvin	718181e7a7	feat(arch): the FP8-to-halfword conversion pairs ... Assisted-by: GLM 5.3 Flash	2026-10-07 21:39:45 +02:00
petrbalvin	107ca512b2	feat(arch): the ZCNOT unary pair and the vector counter step ... Assisted-by: GLM 5.3 Flash	2026-10-07 21:39:45 +02:00
petrbalvin	7aba29ac67	test(arch): pin the golden vectors of the last four families ... Assisted-by: GLM 5.3 Flash	2026-10-07 20:35:42 +02:00
petrbalvin	bd85f8838d	feat(arch): the SVE2.1 last-active vector and compare families ... Assisted-by: GLM 5.3 Flash	2026-10-07 20:35:41 +02:00
petrbalvin	12a5cfff52	feat(arch): the rest of the SVE2 BFloat16 wall ... Assisted-by: GLM 5.3 Flash	2026-10-07 20:35:41 +02:00
petrbalvin	cdc3a75c88	feat(arch): the SVE multiple-structure loads and stores ... Assisted-by: GLM 5.3 Flash	2026-10-07 20:35:41 +02:00
petrbalvin	82dbf087a8	feat(arch): the SVE2 BFloat16 arithmetic core ... Assisted-by: GLM 5.3 Flash	2026-10-07 20:35:41 +02:00
petrbalvin	0760cc91af	feat(arch): the SVE2 three-source and bitwise combine families ... Assisted-by: GLM 5.3 Flash	2026-10-07 20:35:41 +02:00
petrbalvin	bd80499c74	feat(arch): the SVE2 shift-by-vector family ... Assisted-by: GLM 5.3 Flash	2026-10-07 20:35:41 +02:00
petrbalvin	b93fccc075	feat(arch): the SVE2.1 pairwise and quadword-reduction families ... Assisted-by: GLM 5.3 Flash	2026-10-07 20:35:41 +02:00
petrbalvin	31ab584eee	feat(arch): the SVE2.1 narrowing two-to-one family ... Assisted-by: GLM 5.3 Flash	2026-10-07 20:35:41 +02:00
petrbalvin	ee2c6d51b3	fix(arch): keep Zdn out of the class bits of the predicated Z-alias source ... Assisted-by: GLM 5.3 Flash	2026-10-07 20:35:41 +02:00
petrbalvin	e56c04e9ee	fix(asm): read three operands from the arm64 last-element form ... Assisted-by: GLM 5.3	2026-10-07 13:51:10 +02:00
petrbalvin	104bea036b	feat(asm): encode the arm64 SVE gather loads and scatter stores ... Assisted-by: GLM 5.3	2026-10-07 13:51:10 +02:00
petrbalvin	6faf850793	feat(asm): encode the arm64 SVE2 crypto, counter and reduction families ... Assisted-by: GLM 5.3	2026-10-07 13:51:10 +02:00
petrbalvin	6c4932c4ec	feat(arch): the SVE2.1 Z-alias permutations and copies ... Assisted-by: GLM 5.3 Flash	2026-10-07 02:27:35 +02:00
petrbalvin	8231302bca	feat(arch): the SVE predicate family in the extended layer ... Assisted-by: GLM 5.3 Flash	2026-10-07 02:26:19 +02:00
petrbalvin	28bea95128	feat(arch): add the amd64 extended-instruction layer with BF16 and VP2INTERSECT ... Assisted-by: GLM 5.3 Flash	2026-10-07 00:07:58 +02:00
petrbalvin	5a8e9acbf3	feat(arch): add the extended-instruction layer with SVE arithmetic	2026-10-02 20:39:33 +02:00