992 lines
19 KiB
Markdown
992 lines
19 KiB
Markdown
# RISC-V 64: instruction inventory
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Generated by gasm-sdk's `_gen` from the Go toolchain's instruction table
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(`cmd/internal/obj/riscv/anames.go`, go1.27.1); DO NOT EDIT. This page lists every mnemonic
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`go tool asm` accepts on this target, which is the upper bound of the
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language on it: a name absent here is not an instruction of the target,
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and a name present here may still be one gasm's encoder cannot emit yet.
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The inventory carries no per-mnemonic encoder column: on this target
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encodability is decided per operand shape, and the live measured
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coverage is reported by `gasm audit-instructions`.
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| Mnemonic | Notes |
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|---|---|
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| `CALL` | Call subroutine |
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| `DUFFCOPY` | |
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| `DUFFZERO` | |
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| `END` | |
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| `FUNCDATA` | |
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| `GETCALLERPC` | |
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| `JMP` | Unconditional jump |
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| `NOP` | |
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| `PCALIGN` | |
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| `PCALIGNMAX` | |
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| `PCDATA` | |
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| `RET` | Return |
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| `TEXT` | |
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| `UNDEF` | |
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| `ADD` | Integer add |
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| `ADDI` | Add immediate |
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| `ADDIW` | Add immediate (32-bit) |
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| `ADDUW` | |
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| `ADDW` | Add (32-bit) |
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| `AMOADDD` | Atomic add doubleword |
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| `AMOADDW` | Atomic add word |
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| `AMOANDD` | |
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| `AMOANDW` | |
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| `AMOMAXD` | |
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| `AMOMAXUD` | |
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| `AMOMAXUW` | |
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| `AMOMAXW` | |
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| `AMOMIND` | |
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| `AMOMINUD` | |
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| `AMOMINUW` | |
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| `AMOMINW` | |
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| `AMOORD` | |
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| `AMOORW` | |
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| `AMOSWAPD` | Atomic swap doubleword |
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| `AMOSWAPW` | Atomic swap word |
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| `AMOXORD` | |
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| `AMOXORW` | |
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| `AND` | Bitwise AND |
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| `ANDI` | AND immediate |
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| `ANDN` | |
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| `AUIPC` | Add upper immediate to PC |
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| `BCLR` | |
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| `BCLRI` | |
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| `BEQ` | Branch if equal |
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| `BEQZ` | |
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| `BEXT` | |
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| `BEXTI` | |
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| `BGE` | Branch if greater or equal |
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| `BGEU` | Branch if greater or equal unsigned |
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| `BGEZ` | |
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| `BGT` | |
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| `BGTU` | |
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| `BGTZ` | |
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| `BINV` | |
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| `BINVI` | |
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| `BLE` | |
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| `BLEU` | |
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| `BLEZ` | |
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| `BLT` | Branch if less than |
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| `BLTU` | Branch if less than unsigned |
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| `BLTZ` | |
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| `BNE` | Branch if not equal |
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| `BNEZ` | |
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| `BSET` | |
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| `BSETI` | |
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| `CADD` | |
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| `CADDI` | |
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| `CADDI16SP` | |
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| `CADDI4SPN` | |
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| `CADDIW` | |
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| `CADDW` | |
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| `CAND` | |
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| `CANDI` | |
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| `CBEQZ` | |
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| `CBNEZ` | |
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| `CEBREAK` | |
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| `CFLD` | |
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| `CFLDSP` | |
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| `CFSD` | |
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| `CFSDSP` | |
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| `CJ` | |
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| `CJALR` | |
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| `CJR` | |
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| `CLD` | |
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| `CLDSP` | |
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| `CLI` | |
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| `CLUI` | |
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| `CLW` | |
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| `CLWSP` | |
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| `CLZ` | |
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| `CLZW` | |
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| `CMV` | |
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| `CNOP` | |
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| `COR` | |
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| `CPOP` | |
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| `CPOPW` | |
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| `CSD` | |
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| `CSDSP` | |
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| `CSLLI` | |
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| `CSRAI` | |
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| `CSRLI` | |
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| `CSRRC` | |
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| `CSRRCI` | |
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| `CSRRS` | |
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| `CSRRSI` | |
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| `CSRRW` | |
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| `CSRRWI` | |
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| `CSUB` | |
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| `CSUBW` | |
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| `CSW` | |
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| `CSWSP` | |
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| `CTZ` | |
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| `CTZW` | |
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| `CXOR` | |
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| `CZEROEQZ` | |
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| `CZERONEZ` | |
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| `DIV` | Divide |
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| `DIVU` | Divide unsigned |
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| `DIVUW` | |
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| `DIVW` | Divide (32-bit) |
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| `DRET` | |
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| `EBREAK` | Breakpoint |
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| `ECALL` | Environment call |
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| `FABSD` | |
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| `FABSS` | |
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| `FADDD` | FP add (double) |
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| `FADDQ` | |
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| `FADDS` | FP add (single) |
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| `FCLASSD` | |
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| `FCLASSQ` | |
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| `FCLASSS` | |
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| `FCVTDL` | |
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| `FCVTDLU` | |
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| `FCVTDQ` | |
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| `FCVTDS` | |
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| `FCVTDW` | |
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| `FCVTDWU` | |
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| `FCVTLD` | |
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| `FCVTLQ` | |
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| `FCVTLS` | |
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| `FCVTLUD` | |
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| `FCVTLUQ` | |
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| `FCVTLUS` | |
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| `FCVTQD` | |
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| `FCVTQL` | |
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| `FCVTQLU` | |
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| `FCVTQS` | |
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| `FCVTQW` | |
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| `FCVTQWU` | |
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| `FCVTSD` | |
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| `FCVTSL` | |
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| `FCVTSLU` | |
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| `FCVTSQ` | |
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| `FCVTSW` | |
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| `FCVTSWU` | |
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| `FCVTWD` | |
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| `FCVTWQ` | |
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| `FCVTWS` | |
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| `FCVTWUD` | |
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| `FCVTWUQ` | |
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| `FCVTWUS` | |
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| `FDIVD` | FP divide (double) |
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| `FDIVQ` | |
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| `FDIVS` | FP divide (single) |
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| `FENCE` | Memory barrier |
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| `FEQD` | |
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| `FEQQ` | |
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| `FEQS` | |
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| `FLD` | FP load doubleword |
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| `FLED` | |
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| `FLEQ` | |
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| `FLES` | |
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| `FLQ` | |
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| `FLTD` | |
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| `FLTQ` | |
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| `FLTS` | |
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| `FLW` | FP load word |
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| `FMADDD` | |
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| `FMADDQ` | |
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| `FMADDS` | |
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| `FMAXD` | |
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| `FMAXQ` | |
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| `FMAXS` | |
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| `FMIND` | |
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| `FMINQ` | |
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| `FMINS` | |
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| `FMSUBD` | |
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| `FMSUBQ` | |
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| `FMSUBS` | |
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| `FMULD` | FP multiply (double) |
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| `FMULQ` | |
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| `FMULS` | FP multiply (single) |
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| `FMVDX` | |
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| `FMVSX` | |
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| `FMVWX` | |
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| `FMVXD` | |
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| `FMVXS` | |
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| `FMVXW` | |
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| `FNED` | |
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| `FNEGD` | |
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| `FNEGS` | |
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| `FNES` | |
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| `FNMADDD` | |
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| `FNMADDQ` | |
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| `FNMADDS` | |
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| `FNMSUBD` | |
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| `FNMSUBQ` | |
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| `FNMSUBS` | |
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| `FSD` | FP store doubleword |
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| `FSGNJD` | |
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| `FSGNJND` | |
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| `FSGNJNQ` | |
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| `FSGNJNS` | |
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| `FSGNJQ` | |
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| `FSGNJS` | |
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| `FSGNJXD` | |
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| `FSGNJXQ` | |
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| `FSGNJXS` | |
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| `FSQ` | |
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| `FSQRTD` | |
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| `FSQRTQ` | |
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| `FSQRTS` | |
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| `FSUBD` | FP subtract (double) |
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| `FSUBQ` | |
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| `FSUBS` | FP subtract (single) |
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| `FSW` | FP store word |
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| `JAL` | Jump and link |
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| `JALR` | Jump and link register |
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| `LB` | Load byte |
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| `LBU` | Load byte unsigned |
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| `LD` | Load doubleword |
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| `LH` | Load halfword |
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| `LHU` | Load halfword unsigned |
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| `LRD` | Load-reserved doubleword |
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| `LRW` | Load-reserved word |
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| `LUI` | Load upper immediate |
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| `LW` | Load word |
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| `LWU` | Load word unsigned |
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| `MAX` | |
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| `MAXU` | |
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| `MIN` | |
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| `MINU` | |
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| `MOV` | |
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| `MOVB` | |
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| `MOVBU` | |
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| `MOVD` | |
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| `MOVF` | |
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| `MOVH` | |
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| `MOVHU` | |
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| `MOVW` | |
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| `MOVWU` | |
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| `MRET` | |
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| `MUL` | Multiply |
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| `MULH` | Multiply high |
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| `MULHSU` | Multiply high signed/unsigned |
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| `MULHU` | Multiply high unsigned |
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| `MULW` | Multiply (32-bit) |
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| `NEG` | |
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| `NEGW` | |
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| `NOT` | |
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| `OR` | Bitwise OR |
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| `ORCB` | |
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| `ORI` | OR immediate |
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| `ORN` | |
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| `RDCYCLE` | |
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| `RDINSTRET` | |
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| `RDTIME` | |
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| `REM` | Remainder |
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| `REMU` | Remainder unsigned |
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| `REMUW` | |
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| `REMW` | |
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| `REV8` | |
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| `ROL` | |
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| `ROLW` | |
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| `ROR` | |
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| `RORI` | |
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| `RORIW` | |
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| `RORW` | |
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| `SB` | Store byte |
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| `SBREAK` | |
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| `SCALL` | |
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| `SCD` | Store-conditional doubleword |
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| `SCW` | Store-conditional word |
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| `SD` | Store doubleword |
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| `SEQZ` | |
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| `SEXTB` | |
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| `SEXTH` | |
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| `SFENCEVMA` | |
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| `SH` | Store halfword |
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| `SH1ADD` | |
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| `SH1ADDUW` | |
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| `SH2ADD` | |
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| `SH2ADDUW` | |
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| `SH3ADD` | |
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| `SH3ADDUW` | |
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| `SLL` | Shift left logical |
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| `SLLI` | Shift left logical immediate |
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| `SLLIUW` | |
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| `SLLIW` | |
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| `SLLW` | |
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| `SLT` | Set if less than |
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| `SLTI` | Set if less than immediate |
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| `SLTIU` | Set if less than unsigned immediate |
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| `SLTU` | Set if less than unsigned |
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| `SNEZ` | |
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| `SRA` | Shift right arithmetic |
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| `SRAI` | Shift right arithmetic immediate |
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| `SRAIW` | |
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| `SRAW` | |
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| `SRET` | |
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| `SRL` | Shift right logical |
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| `SRLI` | Shift right logical immediate |
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| `SRLIW` | |
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| `SRLW` | |
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| `SUB` | Integer subtract |
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| `SUBW` | Subtract (32-bit) |
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| `SW` | Store word |
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| `VAADDUVV` | |
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| `VAADDUVX` | |
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| `VAADDVV` | |
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| `VAADDVX` | |
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| `VADCVIM` | |
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| `VADCVVM` | |
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| `VADCVXM` | |
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| `VADDVI` | |
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| `VADDVV` | |
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| `VADDVX` | |
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| `VANDVI` | |
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| `VANDVV` | |
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| `VANDVX` | |
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| `VASUBUVV` | |
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| `VASUBUVX` | |
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| `VASUBVV` | |
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| `VASUBVX` | |
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| `VCOMPRESSVM` | |
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| `VCPOPM` | |
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| `VDIVUVV` | |
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| `VDIVUVX` | |
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| `VDIVVV` | |
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| `VDIVVX` | |
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| `VFABSV` | |
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| `VFADDVF` | |
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| `VFADDVV` | |
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| `VFCLASSV` | |
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| `VFCVTFXUV` | |
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| `VFCVTFXV` | |
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| `VFCVTRTZXFV` | |
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| `VFCVTRTZXUFV` | |
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| `VFCVTXFV` | |
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| `VFCVTXUFV` | |
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| `VFDIVVF` | |
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| `VFDIVVV` | |
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| `VFIRSTM` | |
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| `VFMACCVF` | |
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| `VFMACCVV` | |
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| `VFMADDVF` | |
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| `VFMADDVV` | |
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| `VFMAXVF` | |
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| `VFMAXVV` | |
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| `VFMERGEVFM` | |
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| `VFMINVF` | |
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| `VFMINVV` | |
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| `VFMSACVF` | |
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| `VFMSACVV` | |
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| `VFMSUBVF` | |
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| `VFMSUBVV` | |
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| `VFMULVF` | |
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| `VFMULVV` | |
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| `VFMVFS` | |
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| `VFMVSF` | |
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| `VFMVVF` | |
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| `VFNCVTFFW` | |
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| `VFNCVTFXUW` | |
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| `VFNCVTFXW` | |
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| `VFNCVTRODFFW` | |
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| `VFNCVTRTZXFW` | |
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| `VFNCVTRTZXUFW` | |
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| `VFNCVTXFW` | |
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| `VFNCVTXUFW` | |
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| `VFNEGV` | |
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| `VFNMACCVF` | |
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| `VFNMACCVV` | |
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| `VFNMADDVF` | |
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| `VFNMADDVV` | |
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| `VFNMSACVF` | |
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| `VFNMSACVV` | |
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| `VFNMSUBVF` | |
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| `VFNMSUBVV` | |
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| `VFRDIVVF` | |
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| `VFREC7V` | |
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| `VFREDMAXVS` | |
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| `VFREDMINVS` | |
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| `VFREDOSUMVS` | |
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| `VFREDUSUMVS` | |
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| `VFRSQRT7V` | |
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| `VFRSUBVF` | |
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| `VFSGNJNVF` | |
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| `VFSGNJNVV` | |
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| `VFSGNJVF` | |
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| `VFSGNJVV` | |
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| `VFSGNJXVF` | |
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| `VFSGNJXVV` | |
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| `VFSLIDE1DOWNVF` | |
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| `VFSLIDE1UPVF` | |
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| `VFSQRTV` | |
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| `VFSUBVF` | |
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| `VFSUBVV` | |
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| `VFWADDVF` | |
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| `VFWADDVV` | |
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| `VFWADDWF` | |
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| `VFWADDWV` | |
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| `VFWCVTFFV` | |
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| `VFWCVTFXUV` | |
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| `VFWCVTFXV` | |
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| `VFWCVTRTZXFV` | |
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| `VFWCVTRTZXUFV` | |
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| `VFWCVTXFV` | |
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| `VFWCVTXUFV` | |
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| `VFWMACCVF` | |
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| `VFWMACCVV` | |
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| `VFWMSACVF` | |
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| `VFWMSACVV` | |
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| `VFWMULVF` | |
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| `VFWMULVV` | |
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| `VFWNMACCVF` | |
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| `VFWNMACCVV` | |
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| `VFWNMSACVF` | |
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| `VFWNMSACVV` | |
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| `VFWREDOSUMVS` | |
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| `VFWREDUSUMVS` | |
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| `VFWSUBVF` | |
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| `VFWSUBVV` | |
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| `VFWSUBWF` | |
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| `VFWSUBWV` | |
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| `VIDV` | |
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| `VIOTAM` | |
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| `VL1RE16V` | |
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| `VL1RE32V` | |
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| `VL1RE64V` | |
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| `VL1RE8V` | |
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| `VL1RV` | |
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| `VL2RE16V` | |
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| `VL2RE32V` | |
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| `VL2RE64V` | |
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| `VL2RE8V` | |
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| `VL2RV` | |
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| `VL4RE16V` | |
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| `VL4RE32V` | |
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| `VL4RE64V` | |
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| `VL4RE8V` | |
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| `VL4RV` | |
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| `VL8RE16V` | |
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| `VL8RE32V` | |
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| `VL8RE64V` | |
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| `VL8RE8V` | |
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| `VL8RV` | |
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| `VLE16FFV` | |
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| `VLE16V` | |
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| `VLE32FFV` | |
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| `VLE32V` | |
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| `VLE64FFV` | |
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| `VLE64V` | |
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| `VLE8FFV` | |
|
|
| `VLE8V` | |
|
|
| `VLMV` | |
|
|
| `VLOXEI16V` | |
|
|
| `VLOXEI32V` | |
|
|
| `VLOXEI64V` | |
|
|
| `VLOXEI8V` | |
|
|
| `VLOXSEG2EI16V` | |
|
|
| `VLOXSEG2EI32V` | |
|
|
| `VLOXSEG2EI64V` | |
|
|
| `VLOXSEG2EI8V` | |
|
|
| `VLOXSEG3EI16V` | |
|
|
| `VLOXSEG3EI32V` | |
|
|
| `VLOXSEG3EI64V` | |
|
|
| `VLOXSEG3EI8V` | |
|
|
| `VLOXSEG4EI16V` | |
|
|
| `VLOXSEG4EI32V` | |
|
|
| `VLOXSEG4EI64V` | |
|
|
| `VLOXSEG4EI8V` | |
|
|
| `VLOXSEG5EI16V` | |
|
|
| `VLOXSEG5EI32V` | |
|
|
| `VLOXSEG5EI64V` | |
|
|
| `VLOXSEG5EI8V` | |
|
|
| `VLOXSEG6EI16V` | |
|
|
| `VLOXSEG6EI32V` | |
|
|
| `VLOXSEG6EI64V` | |
|
|
| `VLOXSEG6EI8V` | |
|
|
| `VLOXSEG7EI16V` | |
|
|
| `VLOXSEG7EI32V` | |
|
|
| `VLOXSEG7EI64V` | |
|
|
| `VLOXSEG7EI8V` | |
|
|
| `VLOXSEG8EI16V` | |
|
|
| `VLOXSEG8EI32V` | |
|
|
| `VLOXSEG8EI64V` | |
|
|
| `VLOXSEG8EI8V` | |
|
|
| `VLSE16V` | |
|
|
| `VLSE32V` | |
|
|
| `VLSE64V` | |
|
|
| `VLSE8V` | |
|
|
| `VLSEG2E16FFV` | |
|
|
| `VLSEG2E16V` | |
|
|
| `VLSEG2E32FFV` | |
|
|
| `VLSEG2E32V` | |
|
|
| `VLSEG2E64FFV` | |
|
|
| `VLSEG2E64V` | |
|
|
| `VLSEG2E8FFV` | |
|
|
| `VLSEG2E8V` | |
|
|
| `VLSEG3E16FFV` | |
|
|
| `VLSEG3E16V` | |
|
|
| `VLSEG3E32FFV` | |
|
|
| `VLSEG3E32V` | |
|
|
| `VLSEG3E64FFV` | |
|
|
| `VLSEG3E64V` | |
|
|
| `VLSEG3E8FFV` | |
|
|
| `VLSEG3E8V` | |
|
|
| `VLSEG4E16FFV` | |
|
|
| `VLSEG4E16V` | |
|
|
| `VLSEG4E32FFV` | |
|
|
| `VLSEG4E32V` | |
|
|
| `VLSEG4E64FFV` | |
|
|
| `VLSEG4E64V` | |
|
|
| `VLSEG4E8FFV` | |
|
|
| `VLSEG4E8V` | |
|
|
| `VLSEG5E16FFV` | |
|
|
| `VLSEG5E16V` | |
|
|
| `VLSEG5E32FFV` | |
|
|
| `VLSEG5E32V` | |
|
|
| `VLSEG5E64FFV` | |
|
|
| `VLSEG5E64V` | |
|
|
| `VLSEG5E8FFV` | |
|
|
| `VLSEG5E8V` | |
|
|
| `VLSEG6E16FFV` | |
|
|
| `VLSEG6E16V` | |
|
|
| `VLSEG6E32FFV` | |
|
|
| `VLSEG6E32V` | |
|
|
| `VLSEG6E64FFV` | |
|
|
| `VLSEG6E64V` | |
|
|
| `VLSEG6E8FFV` | |
|
|
| `VLSEG6E8V` | |
|
|
| `VLSEG7E16FFV` | |
|
|
| `VLSEG7E16V` | |
|
|
| `VLSEG7E32FFV` | |
|
|
| `VLSEG7E32V` | |
|
|
| `VLSEG7E64FFV` | |
|
|
| `VLSEG7E64V` | |
|
|
| `VLSEG7E8FFV` | |
|
|
| `VLSEG7E8V` | |
|
|
| `VLSEG8E16FFV` | |
|
|
| `VLSEG8E16V` | |
|
|
| `VLSEG8E32FFV` | |
|
|
| `VLSEG8E32V` | |
|
|
| `VLSEG8E64FFV` | |
|
|
| `VLSEG8E64V` | |
|
|
| `VLSEG8E8FFV` | |
|
|
| `VLSEG8E8V` | |
|
|
| `VLSSEG2E16V` | |
|
|
| `VLSSEG2E32V` | |
|
|
| `VLSSEG2E64V` | |
|
|
| `VLSSEG2E8V` | |
|
|
| `VLSSEG3E16V` | |
|
|
| `VLSSEG3E32V` | |
|
|
| `VLSSEG3E64V` | |
|
|
| `VLSSEG3E8V` | |
|
|
| `VLSSEG4E16V` | |
|
|
| `VLSSEG4E32V` | |
|
|
| `VLSSEG4E64V` | |
|
|
| `VLSSEG4E8V` | |
|
|
| `VLSSEG5E16V` | |
|
|
| `VLSSEG5E32V` | |
|
|
| `VLSSEG5E64V` | |
|
|
| `VLSSEG5E8V` | |
|
|
| `VLSSEG6E16V` | |
|
|
| `VLSSEG6E32V` | |
|
|
| `VLSSEG6E64V` | |
|
|
| `VLSSEG6E8V` | |
|
|
| `VLSSEG7E16V` | |
|
|
| `VLSSEG7E32V` | |
|
|
| `VLSSEG7E64V` | |
|
|
| `VLSSEG7E8V` | |
|
|
| `VLSSEG8E16V` | |
|
|
| `VLSSEG8E32V` | |
|
|
| `VLSSEG8E64V` | |
|
|
| `VLSSEG8E8V` | |
|
|
| `VLUXEI16V` | |
|
|
| `VLUXEI32V` | |
|
|
| `VLUXEI64V` | |
|
|
| `VLUXEI8V` | |
|
|
| `VLUXSEG2EI16V` | |
|
|
| `VLUXSEG2EI32V` | |
|
|
| `VLUXSEG2EI64V` | |
|
|
| `VLUXSEG2EI8V` | |
|
|
| `VLUXSEG3EI16V` | |
|
|
| `VLUXSEG3EI32V` | |
|
|
| `VLUXSEG3EI64V` | |
|
|
| `VLUXSEG3EI8V` | |
|
|
| `VLUXSEG4EI16V` | |
|
|
| `VLUXSEG4EI32V` | |
|
|
| `VLUXSEG4EI64V` | |
|
|
| `VLUXSEG4EI8V` | |
|
|
| `VLUXSEG5EI16V` | |
|
|
| `VLUXSEG5EI32V` | |
|
|
| `VLUXSEG5EI64V` | |
|
|
| `VLUXSEG5EI8V` | |
|
|
| `VLUXSEG6EI16V` | |
|
|
| `VLUXSEG6EI32V` | |
|
|
| `VLUXSEG6EI64V` | |
|
|
| `VLUXSEG6EI8V` | |
|
|
| `VLUXSEG7EI16V` | |
|
|
| `VLUXSEG7EI32V` | |
|
|
| `VLUXSEG7EI64V` | |
|
|
| `VLUXSEG7EI8V` | |
|
|
| `VLUXSEG8EI16V` | |
|
|
| `VLUXSEG8EI32V` | |
|
|
| `VLUXSEG8EI64V` | |
|
|
| `VLUXSEG8EI8V` | |
|
|
| `VMACCVV` | |
|
|
| `VMACCVX` | |
|
|
| `VMADCVI` | |
|
|
| `VMADCVIM` | |
|
|
| `VMADCVV` | |
|
|
| `VMADCVVM` | |
|
|
| `VMADCVX` | |
|
|
| `VMADCVXM` | |
|
|
| `VMADDVV` | |
|
|
| `VMADDVX` | |
|
|
| `VMANDMM` | |
|
|
| `VMANDNMM` | |
|
|
| `VMAXUVV` | |
|
|
| `VMAXUVX` | |
|
|
| `VMAXVV` | |
|
|
| `VMAXVX` | |
|
|
| `VMCLRM` | |
|
|
| `VMERGEVIM` | |
|
|
| `VMERGEVVM` | |
|
|
| `VMERGEVXM` | |
|
|
| `VMFEQVF` | |
|
|
| `VMFEQVV` | |
|
|
| `VMFGEVF` | |
|
|
| `VMFGEVV` | |
|
|
| `VMFGTVF` | |
|
|
| `VMFGTVV` | |
|
|
| `VMFLEVF` | |
|
|
| `VMFLEVV` | |
|
|
| `VMFLTVF` | |
|
|
| `VMFLTVV` | |
|
|
| `VMFNEVF` | |
|
|
| `VMFNEVV` | |
|
|
| `VMINUVV` | |
|
|
| `VMINUVX` | |
|
|
| `VMINVV` | |
|
|
| `VMINVX` | |
|
|
| `VMMVM` | |
|
|
| `VMNANDMM` | |
|
|
| `VMNORMM` | |
|
|
| `VMNOTM` | |
|
|
| `VMORMM` | |
|
|
| `VMORNMM` | |
|
|
| `VMSBCVV` | |
|
|
| `VMSBCVVM` | |
|
|
| `VMSBCVX` | |
|
|
| `VMSBCVXM` | |
|
|
| `VMSBFM` | |
|
|
| `VMSEQVI` | |
|
|
| `VMSEQVV` | |
|
|
| `VMSEQVX` | |
|
|
| `VMSETM` | |
|
|
| `VMSGEUVI` | |
|
|
| `VMSGEUVV` | |
|
|
| `VMSGEVI` | |
|
|
| `VMSGEVV` | |
|
|
| `VMSGTUVI` | |
|
|
| `VMSGTUVV` | |
|
|
| `VMSGTUVX` | |
|
|
| `VMSGTVI` | |
|
|
| `VMSGTVV` | |
|
|
| `VMSGTVX` | |
|
|
| `VMSIFM` | |
|
|
| `VMSLEUVI` | |
|
|
| `VMSLEUVV` | |
|
|
| `VMSLEUVX` | |
|
|
| `VMSLEVI` | |
|
|
| `VMSLEVV` | |
|
|
| `VMSLEVX` | |
|
|
| `VMSLTUVI` | |
|
|
| `VMSLTUVV` | |
|
|
| `VMSLTUVX` | |
|
|
| `VMSLTVI` | |
|
|
| `VMSLTVV` | |
|
|
| `VMSLTVX` | |
|
|
| `VMSNEVI` | |
|
|
| `VMSNEVV` | |
|
|
| `VMSNEVX` | |
|
|
| `VMSOFM` | |
|
|
| `VMULHSUVV` | |
|
|
| `VMULHSUVX` | |
|
|
| `VMULHUVV` | |
|
|
| `VMULHUVX` | |
|
|
| `VMULHVV` | |
|
|
| `VMULHVX` | |
|
|
| `VMULVV` | |
|
|
| `VMULVX` | |
|
|
| `VMV1RV` | |
|
|
| `VMV2RV` | |
|
|
| `VMV4RV` | |
|
|
| `VMV8RV` | |
|
|
| `VMVSX` | |
|
|
| `VMVVI` | |
|
|
| `VMVVV` | |
|
|
| `VMVVX` | |
|
|
| `VMVXS` | |
|
|
| `VMXNORMM` | |
|
|
| `VMXORMM` | |
|
|
| `VNCLIPUWI` | |
|
|
| `VNCLIPUWV` | |
|
|
| `VNCLIPUWX` | |
|
|
| `VNCLIPWI` | |
|
|
| `VNCLIPWV` | |
|
|
| `VNCLIPWX` | |
|
|
| `VNCVTXXW` | |
|
|
| `VNEGV` | |
|
|
| `VNMSACVV` | |
|
|
| `VNMSACVX` | |
|
|
| `VNMSUBVV` | |
|
|
| `VNMSUBVX` | |
|
|
| `VNOTV` | |
|
|
| `VNSRAWI` | |
|
|
| `VNSRAWV` | |
|
|
| `VNSRAWX` | |
|
|
| `VNSRLWI` | |
|
|
| `VNSRLWV` | |
|
|
| `VNSRLWX` | |
|
|
| `VORVI` | |
|
|
| `VORVV` | |
|
|
| `VORVX` | |
|
|
| `VREDANDVS` | |
|
|
| `VREDMAXUVS` | |
|
|
| `VREDMAXVS` | |
|
|
| `VREDMINUVS` | |
|
|
| `VREDMINVS` | |
|
|
| `VREDORVS` | |
|
|
| `VREDSUMVS` | |
|
|
| `VREDXORVS` | |
|
|
| `VREMUVV` | |
|
|
| `VREMUVX` | |
|
|
| `VREMVV` | |
|
|
| `VREMVX` | |
|
|
| `VRGATHEREI16VV` | |
|
|
| `VRGATHERVI` | |
|
|
| `VRGATHERVV` | |
|
|
| `VRGATHERVX` | |
|
|
| `VRSUBVI` | |
|
|
| `VRSUBVX` | |
|
|
| `VS1RV` | |
|
|
| `VS2RV` | |
|
|
| `VS4RV` | |
|
|
| `VS8RV` | |
|
|
| `VSADDUVI` | |
|
|
| `VSADDUVV` | |
|
|
| `VSADDUVX` | |
|
|
| `VSADDVI` | |
|
|
| `VSADDVV` | |
|
|
| `VSADDVX` | |
|
|
| `VSBCVVM` | |
|
|
| `VSBCVXM` | |
|
|
| `VSE16V` | |
|
|
| `VSE32V` | |
|
|
| `VSE64V` | |
|
|
| `VSE8V` | |
|
|
| `VSETIVLI` | |
|
|
| `VSETVL` | |
|
|
| `VSETVLI` | |
|
|
| `VSEXTVF2` | |
|
|
| `VSEXTVF4` | |
|
|
| `VSEXTVF8` | |
|
|
| `VSLIDE1DOWNVX` | |
|
|
| `VSLIDE1UPVX` | |
|
|
| `VSLIDEDOWNVI` | |
|
|
| `VSLIDEDOWNVX` | |
|
|
| `VSLIDEUPVI` | |
|
|
| `VSLIDEUPVX` | |
|
|
| `VSLLVI` | |
|
|
| `VSLLVV` | |
|
|
| `VSLLVX` | |
|
|
| `VSMULVV` | |
|
|
| `VSMULVX` | |
|
|
| `VSMV` | |
|
|
| `VSOXEI16V` | |
|
|
| `VSOXEI32V` | |
|
|
| `VSOXEI64V` | |
|
|
| `VSOXEI8V` | |
|
|
| `VSOXSEG2EI16V` | |
|
|
| `VSOXSEG2EI32V` | |
|
|
| `VSOXSEG2EI64V` | |
|
|
| `VSOXSEG2EI8V` | |
|
|
| `VSOXSEG3EI16V` | |
|
|
| `VSOXSEG3EI32V` | |
|
|
| `VSOXSEG3EI64V` | |
|
|
| `VSOXSEG3EI8V` | |
|
|
| `VSOXSEG4EI16V` | |
|
|
| `VSOXSEG4EI32V` | |
|
|
| `VSOXSEG4EI64V` | |
|
|
| `VSOXSEG4EI8V` | |
|
|
| `VSOXSEG5EI16V` | |
|
|
| `VSOXSEG5EI32V` | |
|
|
| `VSOXSEG5EI64V` | |
|
|
| `VSOXSEG5EI8V` | |
|
|
| `VSOXSEG6EI16V` | |
|
|
| `VSOXSEG6EI32V` | |
|
|
| `VSOXSEG6EI64V` | |
|
|
| `VSOXSEG6EI8V` | |
|
|
| `VSOXSEG7EI16V` | |
|
|
| `VSOXSEG7EI32V` | |
|
|
| `VSOXSEG7EI64V` | |
|
|
| `VSOXSEG7EI8V` | |
|
|
| `VSOXSEG8EI16V` | |
|
|
| `VSOXSEG8EI32V` | |
|
|
| `VSOXSEG8EI64V` | |
|
|
| `VSOXSEG8EI8V` | |
|
|
| `VSRAVI` | |
|
|
| `VSRAVV` | |
|
|
| `VSRAVX` | |
|
|
| `VSRLVI` | |
|
|
| `VSRLVV` | |
|
|
| `VSRLVX` | |
|
|
| `VSSE16V` | |
|
|
| `VSSE32V` | |
|
|
| `VSSE64V` | |
|
|
| `VSSE8V` | |
|
|
| `VSSEG2E16V` | |
|
|
| `VSSEG2E32V` | |
|
|
| `VSSEG2E64V` | |
|
|
| `VSSEG2E8V` | |
|
|
| `VSSEG3E16V` | |
|
|
| `VSSEG3E32V` | |
|
|
| `VSSEG3E64V` | |
|
|
| `VSSEG3E8V` | |
|
|
| `VSSEG4E16V` | |
|
|
| `VSSEG4E32V` | |
|
|
| `VSSEG4E64V` | |
|
|
| `VSSEG4E8V` | |
|
|
| `VSSEG5E16V` | |
|
|
| `VSSEG5E32V` | |
|
|
| `VSSEG5E64V` | |
|
|
| `VSSEG5E8V` | |
|
|
| `VSSEG6E16V` | |
|
|
| `VSSEG6E32V` | |
|
|
| `VSSEG6E64V` | |
|
|
| `VSSEG6E8V` | |
|
|
| `VSSEG7E16V` | |
|
|
| `VSSEG7E32V` | |
|
|
| `VSSEG7E64V` | |
|
|
| `VSSEG7E8V` | |
|
|
| `VSSEG8E16V` | |
|
|
| `VSSEG8E32V` | |
|
|
| `VSSEG8E64V` | |
|
|
| `VSSEG8E8V` | |
|
|
| `VSSRAVI` | |
|
|
| `VSSRAVV` | |
|
|
| `VSSRAVX` | |
|
|
| `VSSRLVI` | |
|
|
| `VSSRLVV` | |
|
|
| `VSSRLVX` | |
|
|
| `VSSSEG2E16V` | |
|
|
| `VSSSEG2E32V` | |
|
|
| `VSSSEG2E64V` | |
|
|
| `VSSSEG2E8V` | |
|
|
| `VSSSEG3E16V` | |
|
|
| `VSSSEG3E32V` | |
|
|
| `VSSSEG3E64V` | |
|
|
| `VSSSEG3E8V` | |
|
|
| `VSSSEG4E16V` | |
|
|
| `VSSSEG4E32V` | |
|
|
| `VSSSEG4E64V` | |
|
|
| `VSSSEG4E8V` | |
|
|
| `VSSSEG5E16V` | |
|
|
| `VSSSEG5E32V` | |
|
|
| `VSSSEG5E64V` | |
|
|
| `VSSSEG5E8V` | |
|
|
| `VSSSEG6E16V` | |
|
|
| `VSSSEG6E32V` | |
|
|
| `VSSSEG6E64V` | |
|
|
| `VSSSEG6E8V` | |
|
|
| `VSSSEG7E16V` | |
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| `VSSSEG7E32V` | |
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| `VSSSEG7E64V` | |
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| `VSSSEG7E8V` | |
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| `VSSSEG8E16V` | |
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| `VSSSEG8E32V` | |
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| `VSSSEG8E64V` | |
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| `VSSSEG8E8V` | |
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| `VSSUBUVV` | |
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| `VSSUBUVX` | |
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| `VSSUBVV` | |
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| `VSSUBVX` | |
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| `VSUBVV` | |
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| `VSUBVX` | |
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| `VSUXEI16V` | |
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| `VSUXEI32V` | |
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| `VSUXEI64V` | |
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| `VSUXEI8V` | |
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| `VSUXSEG2EI16V` | |
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| `VSUXSEG2EI32V` | |
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| `VSUXSEG2EI64V` | |
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| `VSUXSEG2EI8V` | |
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| `VSUXSEG3EI16V` | |
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| `VSUXSEG3EI32V` | |
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| `VSUXSEG3EI64V` | |
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| `VSUXSEG3EI8V` | |
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| `VSUXSEG4EI16V` | |
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| `VSUXSEG4EI32V` | |
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| `VSUXSEG4EI64V` | |
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| `VSUXSEG4EI8V` | |
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| `VSUXSEG5EI16V` | |
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| `VSUXSEG5EI32V` | |
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| `VSUXSEG5EI64V` | |
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| `VSUXSEG5EI8V` | |
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| `VSUXSEG6EI16V` | |
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| `VSUXSEG6EI32V` | |
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| `VSUXSEG6EI64V` | |
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| `VSUXSEG6EI8V` | |
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| `VSUXSEG7EI16V` | |
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| `VSUXSEG7EI32V` | |
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| `VSUXSEG7EI64V` | |
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| `VSUXSEG7EI8V` | |
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| `VSUXSEG8EI16V` | |
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| `VSUXSEG8EI32V` | |
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| `VSUXSEG8EI64V` | |
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| `VSUXSEG8EI8V` | |
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| `VWADDUVV` | |
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| `VWADDUVX` | |
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| `VWADDUWV` | |
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| `VWADDUWX` | |
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| `VWADDVV` | |
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| `VWADDVX` | |
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| `VWADDWV` | |
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| `VWADDWX` | |
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| `VWCVTUXXV` | |
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| `VWCVTXXV` | |
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| `VWMACCSUVV` | |
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| `VWMACCSUVX` | |
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| `VWMACCUSVX` | |
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| `VWMACCUVV` | |
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| `VWMACCUVX` | |
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| `VWMACCVV` | |
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| `VWMACCVX` | |
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| `VWMULSUVV` | |
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| `VWMULSUVX` | |
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| `VWMULUVV` | |
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| `VWMULUVX` | |
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| `VWMULVV` | |
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| `VWMULVX` | |
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| `VWREDSUMUVS` | |
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| `VWREDSUMVS` | |
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| `VWSUBUVV` | |
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| `VWSUBUVX` | |
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| `VWSUBUWV` | |
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| `VWSUBUWX` | |
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| `VWSUBVV` | |
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| `VWSUBVX` | |
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| `VWSUBWV` | |
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| `VWSUBWX` | |
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| `VXORVI` | |
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| `VXORVV` | |
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| `VXORVX` | |
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| `VZEXTVF2` | |
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| `VZEXTVF4` | |
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| `VZEXTVF8` | |
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| `WFI` | |
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| `WORD` | |
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| `XNOR` | |
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| `XOR` | Bitwise XOR |
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| `XORI` | XOR immediate |
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| `ZEXTH` | |
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Recognised: 975 mnemonics.
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