Files
gasm-sdk/asm
petrbalvin 5de9e985f8 feat(asm): encode the riscv64 vector load and store families
The vector memory section stopped at the three hand-written shapes the
GOROOT kernels use: every other spelling the toolchain accepts, the
width variants, the constant-stride and indexed accesses, the segment
families, the fault-only-first loads, the whole-register moves and the
bit-mask pair were names without an encoder.  The mnemonic now parses
into its own fields (direction, segment count, addressing mode, width,
fault-only-first and whole-register markers) and one encoder lays the
word down, with the optional V0 mask operand and the toolchain's
operand shapes.  VSETVL joins the configuration settings.  The
toolchain's whole vector memory section, six hundred and twenty-eight
statements of masked and unmasked forms, is a differential test against
the oracle, word for word.

Assisted-by: GLM 5.3 Flash
2026-10-07 00:47:27 +02:00
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